ref: fc5424cb72e477c5f1bbfaeddb5c50b851a965ae
src/drivers/SpiMaster.cpp
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 |
#include "drivers/SpiMaster.h" #include <hal/nrf_gpio.h> #include <hal/nrf_spim.h> #include <nrfx_log.h> #include <algorithm> using namespace Pinetime::Drivers; SpiMaster::SpiMaster(const SpiMaster::SpiModule spi, const SpiMaster::Parameters& params) : spi {spi}, params {params} { } bool SpiMaster::Init() { if (mutex == nullptr) { mutex = xSemaphoreCreateBinary(); ASSERT(mutex != nullptr); } /* Configure GPIO pins used for pselsck, pselmosi, pselmiso and pselss for SPI0 */ nrf_gpio_pin_set(params.pinSCK); nrf_gpio_cfg_output(params.pinSCK); nrf_gpio_pin_clear(params.pinMOSI); nrf_gpio_cfg_output(params.pinMOSI); nrf_gpio_cfg_input(params.pinMISO, NRF_GPIO_PIN_NOPULL); // nrf_gpio_cfg_output(params.pinCSN); // pinCsn = params.pinCSN; switch (spi) { case SpiModule::SPI0: spiBaseAddress = NRF_SPIM0; break; case SpiModule::SPI1: spiBaseAddress = NRF_SPIM1; break; default: return false; } /* Configure pins, frequency and mode */ spiBaseAddress->PSELSCK = params.pinSCK; spiBaseAddress->PSELMOSI = params.pinMOSI; spiBaseAddress->PSELMISO = params.pinMISO; uint32_t frequency; switch (params.Frequency) { case Frequencies::Freq8Mhz: frequency = 0x80000000; break; default: return false; } spiBaseAddress->FREQUENCY = frequency; uint32_t regConfig = 0; switch (params.bitOrder) { case BitOrder::Msb_Lsb: break; case BitOrder::Lsb_Msb: regConfig = 1; break; default: return false; } switch (params.mode) { case Modes::Mode0: break; case Modes::Mode1: regConfig |= (0x01 << 1); break; case Modes::Mode2: regConfig |= (0x02 << 1); break; case Modes::Mode3: regConfig |= (0x03 << 1); break; default: return false; } spiBaseAddress->CONFIG = regConfig; spiBaseAddress->EVENTS_ENDRX = 0; spiBaseAddress->EVENTS_ENDTX = 0; spiBaseAddress->EVENTS_END = 0; spiBaseAddress->INTENSET = ((unsigned) 1 << (unsigned) 6); spiBaseAddress->INTENSET = ((unsigned) 1 << (unsigned) 1); spiBaseAddress->INTENSET = ((unsigned) 1 << (unsigned) 19); spiBaseAddress->ENABLE = (SPIM_ENABLE_ENABLE_Enabled << SPIM_ENABLE_ENABLE_Pos); NRFX_IRQ_PRIORITY_SET(SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQn, 2); NRFX_IRQ_ENABLE(SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQn); xSemaphoreGive(mutex); return true; } void SpiMaster::SetupWorkaroundForFtpan58(NRF_SPIM_Type* spim, uint32_t ppi_channel, uint32_t gpiote_channel) { // Create an event when SCK toggles. NRF_GPIOTE->CONFIG[gpiote_channel] = (GPIOTE_CONFIG_MODE_Event << GPIOTE_CONFIG_MODE_Pos) | (spim->PSEL.SCK << GPIOTE_CONFIG_PSEL_Pos) | (GPIOTE_CONFIG_POLARITY_Toggle << GPIOTE_CONFIG_POLARITY_Pos); // Stop the spim instance when SCK toggles. NRF_PPI->CH[ppi_channel].EEP = (uint32_t) &NRF_GPIOTE->EVENTS_IN[gpiote_channel]; NRF_PPI->CH[ppi_channel].TEP = (uint32_t) &spim->TASKS_STOP; NRF_PPI->CHENSET = 1U << ppi_channel; spiBaseAddress->EVENTS_END = 0; // Disable IRQ spim->INTENCLR = (1 << 6); spim->INTENCLR = (1 << 1); spim->INTENCLR = (1 << 19); } void SpiMaster::DisableWorkaroundForFtpan58(NRF_SPIM_Type* spim, uint32_t ppi_channel, uint32_t gpiote_channel) { NRF_GPIOTE->CONFIG[gpiote_channel] = 0; NRF_PPI->CH[ppi_channel].EEP = 0; NRF_PPI->CH[ppi_channel].TEP = 0; NRF_PPI->CHENSET = ppi_channel; spiBaseAddress->EVENTS_END = 0; spim->INTENSET = (1 << 6); spim->INTENSET = (1 << 1); spim->INTENSET = (1 << 19); } void SpiMaster::OnEndEvent() { if (currentBufferAddr == 0) { return; } auto s = currentBufferSize; if (s > 0) { auto currentSize = std::min((size_t) 255, s); PrepareTx(currentBufferAddr, currentSize); currentBufferAddr = currentBufferAddr + currentSize; currentBufferSize = currentBufferSize - currentSize; spiBaseAddress->TASKS_START = 1; } else { BaseType_t xHigherPriorityTaskWoken = pdFALSE; if (taskToNotify != nullptr) { vTaskNotifyGiveFromISR(taskToNotify, &xHigherPriorityTaskWoken); portYIELD_FROM_ISR(xHigherPriorityTaskWoken); } nrf_gpio_pin_set(this->pinCsn); currentBufferAddr = 0; BaseType_t xHigherPriorityTaskWoken2 = pdFALSE; xSemaphoreGiveFromISR(mutex, &xHigherPriorityTaskWoken2); portYIELD_FROM_ISR(xHigherPriorityTaskWoken | xHigherPriorityTaskWoken2); } } void SpiMaster::OnStartedEvent() { } void SpiMaster::PrepareTx(const uint32_t bufferAddress, const size_t size) { spiBaseAddress->TXD.PTR = bufferAddress; spiBaseAddress->TXD.MAXCNT = size; spiBaseAddress->TXD.LIST = 0; spiBaseAddress->RXD.PTR = 0; spiBaseAddress->RXD.MAXCNT = 0; spiBaseAddress->RXD.LIST = 0; spiBaseAddress->EVENTS_END = 0; } void SpiMaster::PrepareRx(const uint32_t bufferAddress, const size_t size) { spiBaseAddress->TXD.PTR = 0; spiBaseAddress->TXD.MAXCNT = 0; spiBaseAddress->TXD.LIST = 0; spiBaseAddress->RXD.PTR = bufferAddress; spiBaseAddress->RXD.MAXCNT = size; spiBaseAddress->RXD.LIST = 0; spiBaseAddress->EVENTS_END = 0; } bool SpiMaster::Write(uint8_t pinCsn, const uint8_t* data, size_t size) { if (data == nullptr) return false; auto ok = xSemaphoreTake(mutex, portMAX_DELAY); ASSERT(ok == true); taskToNotify = xTaskGetCurrentTaskHandle(); this->pinCsn = pinCsn; if (size == 1) { SetupWorkaroundForFtpan58(spiBaseAddress, 0, 0); } else { DisableWorkaroundForFtpan58(spiBaseAddress, 0, 0); } nrf_gpio_pin_clear(this->pinCsn); currentBufferAddr = (uint32_t) data; currentBufferSize = size; auto currentSize = std::min((size_t) 255, (size_t) currentBufferSize); PrepareTx(currentBufferAddr, currentSize); currentBufferSize = currentBufferSize - currentSize; currentBufferAddr = currentBufferAddr + currentSize; spiBaseAddress->TASKS_START = 1; if (size == 1) { while (spiBaseAddress->EVENTS_END == 0) ; nrf_gpio_pin_set(this->pinCsn); currentBufferAddr = 0; DisableWorkaroundForFtpan58(spiBaseAddress, 0, 0); xSemaphoreGive(mutex); } return true; } bool SpiMaster::Read(uint8_t pinCsn, uint8_t* cmd, size_t cmdSize, uint8_t* data, size_t dataSize) { xSemaphoreTake(mutex, portMAX_DELAY); taskToNotify = nullptr; this->pinCsn = pinCsn; DisableWorkaroundForFtpan58(spiBaseAddress, 0, 0); spiBaseAddress->INTENCLR = (1 << 6); spiBaseAddress->INTENCLR = (1 << 1); spiBaseAddress->INTENCLR = (1 << 19); nrf_gpio_pin_clear(this->pinCsn); currentBufferAddr = 0; currentBufferSize = 0; PrepareTx((uint32_t) cmd, cmdSize); spiBaseAddress->TASKS_START = 1; while (spiBaseAddress->EVENTS_END == 0) ; PrepareRx((uint32_t) data, dataSize); spiBaseAddress->TASKS_START = 1; while (spiBaseAddress->EVENTS_END == 0) ; nrf_gpio_pin_set(this->pinCsn); xSemaphoreGive(mutex); return true; } void SpiMaster::Sleep() { while (spiBaseAddress->ENABLE != 0) { spiBaseAddress->ENABLE = (SPIM_ENABLE_ENABLE_Disabled << SPIM_ENABLE_ENABLE_Pos); } nrf_gpio_cfg_default(params.pinSCK); nrf_gpio_cfg_default(params.pinMOSI); nrf_gpio_cfg_default(params.pinMISO); NRF_LOG_INFO("[SPIMASTER] sleep") } void SpiMaster::Wakeup() { Init(); NRF_LOG_INFO("[SPIMASTER] Wakeup"); } bool SpiMaster::WriteCmdAndBuffer(uint8_t pinCsn, const uint8_t* cmd, size_t cmdSize, const uint8_t* data, size_t dataSize) { xSemaphoreTake(mutex, portMAX_DELAY); taskToNotify = nullptr; this->pinCsn = pinCsn; DisableWorkaroundForFtpan58(spiBaseAddress, 0, 0); spiBaseAddress->INTENCLR = (1 << 6); spiBaseAddress->INTENCLR = (1 << 1); spiBaseAddress->INTENCLR = (1 << 19); nrf_gpio_pin_clear(this->pinCsn); currentBufferAddr = 0; currentBufferSize = 0; PrepareTx((uint32_t) cmd, cmdSize); spiBaseAddress->TASKS_START = 1; while (spiBaseAddress->EVENTS_END == 0) ; PrepareTx((uint32_t) data, dataSize); spiBaseAddress->TASKS_START = 1; while (spiBaseAddress->EVENTS_END == 0) ; nrf_gpio_pin_set(this->pinCsn); xSemaphoreGive(mutex); return true; } |